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The best solution to verify your payment applications


AT KEOLABS, ALL OUR PLATFORMS AND SOLUTIONS ARE EMVCo CERTIFIED.

EMV™ is the global standard for payment cards and readers based on contact and contactless smart card technologies. The EMV standards encompass specifications, test procedures and compliance processes managed by EMVCo1, an organisation jointly owned and operated by American Express, Discover, JCB, MasterCard, UnionPay and Visa. KEOLABS provides complete testing solutions developed and qualified in accordance with EMVCo requirements.

Used by the best EMVCo laboratories

KEOLABS’ SCRIPTIS Analog and Digital test suites for EMVCo testing allow validation of the analog and digital-level implementations in Proximity Integrated Circuit Cards (PICC) and Proximity Coupling Devices (PCD) for use in payment applications.

The testing solutions are complemented by a complete test bench that includes EMVCo testing accessories, which are developed in strict conformance their testing standards.

SCRIPTIS: an intuitive testing environement

SCRIPTIS™ software is a complete, open and simple testing environment. It runs on the user’s PC and allows easy control of a range of software/hardware solutions designed for testing conformance of smart cards, card readers, related components and systems in accordance with relevant industry standards.

KEOLABS’ test suites are used in SCRIPTIS™ testing environment which facilitates testing with automation features such as visual cues and aids for manual testing, or robot integration for fully automated testing. SCRIPTIS provides full visibility of test results including logs and traces of communications between the test bench and the tested device.

 

 

Technical Characteristics
License Options
Hardware Components

 

EMV® CONTACTLESS TERMINAL LEVEL 1 TYPE APPROVAL

1. PCD ANALOG EMVCo TEST SUITE

This EMVCo PCD Analog test suite is compatible with the following standard:

EMVCo PCD Level 1

Analog Test Cases – Version 3.0

 

Our coverage of this test specification includes the following test cases (numbering according to the EMVCo version 3.0):

 

Radio Frequency Power

  • §8.8.1.1. TAB111.x.1.zrf – Verifying the PCD to PICC Power Transfer
  • §8.8.1.2. TAB112.1.1.200 – Verifying the PCD Carrier Frequency
  • §8.8.1.3. TAB113.0.0.z00 – Verifying the PCD Operating Field Resetting
  • §8.8.1.4. TAB114.0.0.200 – Verifying the PCD Power-Off of the Operating Field
  • §8.8.1.5. TAB115.1.3.200 – Polling sequence when supporting other technologies

 

PCD to PICC Signal Interface for Type A Communications

  • §8.8.2.1. TA121.x.y.z00 – Verifying the t1 Timing
  • §8.8.2.2. TA122..y.z00 – Verifying the Monotonic Decrease from V4 to V2
  • §8.8.2.3. TA123.x.y.z00 – Verifying the Ringing
  • §8.8.2.4. TA124.x.y.z00 – Verifying the t2 Timing
  • §8.8.2.5. TA125.x.y.z00 – Verifying the t3 and t4 Timings
  • §8.8.2.6. TA127.x.y.z00 – Verifying the Monotonic Increase from V2 to V4
  • §8.8.2.7. TA128.x.y.z00 – Verifying the Overshoot

 

PICC to PCD Signal Interface for Type A Communications

  • §8.8.3.1. TA131.x.1.zrf – Verifying the Load Modulation VS1,pp at Minimum Positive Modulation
  • §8.8.3.2. TA132.x.1.zrf – Verifying the Load Modulation VS2,pp at Minimum Positive Modulation
  • §8.8.3.3. TA133.x.1.zrf – Verifying the Load Modulation VS1,pp at Maximum Positive Modulation
  • §8.8.3.4. TA134.x.1.zrf – Verifying the Load Modulation VS2,pp at Maximum Positive Modulation
  • §8.8.3.5. TA135.x.1.zrf – Verifying the Load Modulation VS1,pp at Minimum Negative Modulation
  • §8.8.3.6. TA136.x.1.zrf – Verifying the Load Modulation VS2,pp at Minimum Negative Modulation
  • §8.8.3.7. TA137.x.1.zrf – Verifying the Load Modulation VS1,pp at Maximum Negative Modulation
  • §8.8.3.8. TA138.x.1.zrf – Verifying the Load Modulation VS2,pp at Maximum Negative Modulation
  • §8.8.3.9. TA139.1.1.000 – Verifying the FDTA,PICC tolerance

 

Bit Level Coding Signal Interface for Type A Communications

  • §8.8.4.1. TA141.1.3.200 – Verifying the PCD Transmitted Bit Rate
  • §8.8.4.2. TA142.1.3.200 – Verifying the Bit Coding and De-synchronization PCD to PICC
  • §8.8.4.3. TA143.1.3.200 – Verifying the Bit Coding and De-synchronization PICC to PCD

 

PCD to PICC Signal Interface for Type B Communications

  • §8.8.5.1. TB121.x.y.z00 – Verifying the Modulation Index
  • §8.8.5.2. TB122.x.y.z00 – Verifying the Fall Time
  • §8.8.5.3. TB123.x.y.z00 – Verifying the Rise Time
  • §8.8.5.4. TB124.x.y.z00 – Verifying the Monotonic Rising Edge
  • §8.8.5.5. TB125.x.y.z00 – Verifying the Monotonic Falling Edge
  • §8.8.5.6. TB126.x.y.z00 – Verifying Overshoots
  • §8.8.5.7. TB127.x.y.z00 – Verifying Undershoots

 

PICC to PCD Signal Interface for Type B Communications

  • §8.8.6.1. TB131.x.1.zrf – Verifying the Load Modulation VS1,pp at Minimum Positive Modulation
  • §8.8.6.2. TB132.x.1.zrf – Verifying the Load Modulation VS2,pp at Minimum Positive Modulation
  • §8.8.6.3. TB133.x.1.zrf – Verifying the Load Modulation VS1,pp at Maximum Positive Modulation
  • §8.8.6.4. TB134.x.1.zrf – Verifying the Load Modulation VS2,pp at Maximum Positive Modulation
  • §8.8.6.5. TB135.x.1.zrf – Verifying the Load Modulation VS1,pp at Minimum Negative Modulation
  • §8.8.6.6. TB136.x.1.zrf – Verifying the Load Modulation VS2,pp at Minimum Negative Modulation
  • §8.8.6.7. TB137.x.1.zrf – Verifying the Load Modulation VS1,pp at Maximum Negative Modulation
  • §8.8.6.8. TB138.x.1.zrf – Verifying the Load Modulation VS2,pp at Maximum Negative Modulation

 

Bit Level Coding Signal Interface for Type B Communications

  • §8.8.7.1. TB141.1.3.200 – Verifying the PCD Transmitted Bit Rate
  • §8.8.7.2. TB142.1.3.200 – Verifying the Synchronization, Bit Coding and De-synchronization of PCD to PICC
  • §8.8.7.3. TB145.1.3.200 – Verifying the Maximum Limit De-synchronization PICC to PCD (tFSOFF,MAX)
  • §8.8.7.4. TB147.1.3.200 – Verifying the Bit Boundaries with Type B Communications
  • §8.8.7.5. TB148.1.3.200 – Verifying the Minimum Limit De-synchronization PICC to PCD (tFSOFF,MIN)

 

 

2. PCD DIGITAL EMVCo TEST SUITE

This EMVCo PCD Digital test suite is compatible with the following standard:

EMVCo PCD Level 1

Digital Test Cases – Version 3.0

 

Our coverage of this test specification includes the following test cases (numbering according to the EMVCo version 3.0):

 

Type A Tests:

  • §4.1. TA001 – Basic Type A Exchange (single size UID) and timings measurement
  • §4.2. TA002 – Type A Correct Removal
  • §4.3. TA003.x – Basic Type A Exchange with the minimum and the default maximum Frame Delay Time PCD to PICC
  • §4.4. TA101.x – Type A Installation with double and triple UID size
  • §4.5. TA102.x – Type A Installation with supported values of ATQA
  • §4.6. TA103.x – Type A Installation with supported values of SAK and of the TA(1) byte of the ATS
  • §4.7. TA104.xy – Type A Installation with supported values of the TL byte (and historical bytes) of the ATS
  • §4.8. TA105.xy – Type A Installation with supported values of SFGI in the TB(1) byte of the ATS
  • §4.9. TA106.x – Type A Installation with supported values of the TC(1) byte of the ATS
  • §4.10. TA108 – Type A Installation with Type A frame answered to HLTA command
  • 4.11. TA110.x – Type A Installation with different values of ATQA
  • 4.12. TA201.xy – Type A Error free non-chained I-Blocks exchanges for all possible values of FWT
  • 4.13. TA202.xy – Type A Error free chained I-Blocks in both directions for different values of FSC
  • 4.14. TA203.xy – Type A Error free chained I-Blocks transmission for FSC = 16 to 256 bytes
  • 4.15. TA204 – Type A Error free request for Frame Waiting Time Extension on non-chained I-Blocks
  • 4.16. TA205 – Type A Error free request for Frame Waiting Time Extension during chaining in both directions
  • 4.17. TA206 – Type A Error free chained I-Blocks in both directions with different values of FSD
  • 4.18. TA210 – Type A Error free chained I-Blocks reception with rare frame sizes
  • 4.19. TA215.x – Type A Error free exchange with the minimum Frame Delay Time PCD to PICC for different values of the Frame Waiting Time
  • 4.20. TA301.xy – Type A Polling with an error after WUPA
  • 4.21. TA302.xy – Type A Collision detection with an error after ANTICOLLISION CL1
  • 4.22. TA303 – Type A Polling with detection of a Type A then a Type B PICC
  • 4.23. TA304.xy – Type A Collision detection with an error after WUPA
  • 4.24. TA305.xy – Type A Collision detection with an error after SELECT CL1
  • 4.25. TA306.xy – Type A Activation with an error after RATS
  • 4.26. TA307.x – Type A Activation with ‘noise’ after RATS
  • 4.27. TA310 – Type A Collision detection with a time-out after ANTICOLLISION CL1
  • 4.28. TA311.x – Type A Collision detection with a time-out after WUPA
  • 4.29. TA312 – Type A Collision detection with a time-out after SELECT CL1
  • 4.30. TA313 – Type A Activation with a time-out after RATS
  • 4.31. TA335.xy – Type A Activation with respect of the EMD Suppression behavior after RATS
  • 4.32. TA340.x – Type A Activation with respect of the ‘deaf time’ after RATS
  • 4.33. TA401.xy – Type A Error notification on an I-Block not indicating chaining
  • 4.34. TA402 – Type A Time-out after an I-Block not indicating chaining
  • 4.35. TA403.x – Type A Transmission error in response to an I-Block not indicating chaining
  • 4.36. TA404.x – Type A Protocol error in response to an I-Block not indicating chaining
  • 4.37. TA405.xy – Type A Error notification on an I-Block indicating chaining
  • 4.38. TA406 – Type A Time-out after an I-Block indicating chaining
  • 4.39. TA407.x – Type A Transmission error in response to an I-Block indicating chaining
  • 4.40. TA408.xy – Type A Protocol error in response to an I-Block indicating chaining
  • 4.41. TA409.xy – Type A Time-out after an R(ACK) Block (i.e. error notification)
  • 4.42. TA410.x – Type A Transmission error in response to an R(ACK) Block
  • 4.43. TA411.xy – Type A Protocol error in response to an R(ACK) Block
  • 4.44. TA412.xy – Type A Single time-out after an S(WTX) Response Block (several values of WTXM)
  • 4.45. TA413 – Type A Repeated use of a FWT Extension after a single S(WTX) Request
  • 4.46. TA414.x – Type A ‘Noise’ in response to an I-Block not indicating chaining
  • 4.47. TA415.x – Type A ‘Noise’ in response to an I-Block indicating chaining
  • 4.48. TA416.x – Type A ‘Noise’ in response to an R(ACK) Block
  • 4.49. TA417.xy – Type A Protocol error in response to an R(NAK)-Block sent to notify a transmission error
  • 4.50. TA420 – Type A Removal with an error after WUPA
  • 4.51. TA421 – Type A Consecutive time-outs after S(WTX) Response Blocks
  • 4.52. TA430.xy – Type A Block protocol with respect of the EMD suppression behavior
  • 4.53. TA435.x – Type A Block Protocol with respect of the ‘deaf time’
  • 4.54. TA440 – Type A Parity error in the first 4 bytes of a sequence in response to an I-Block not indicating chaining
  • 4.55. TA441 – Type A Parity error in the first 4 bytes of a sequence in response to an I-Block indicating chaining
  • 4.56. TA442 – Type A Parity error in the first 4 bytes of a sequence in response to an R(ACK) Block
  • 4.57. TA443 – Type A Parity error in the first 4 bytes of a sequence in response to an S(WTX) Response Block

 

Type B Tests:

  • 5.1. TB000 – Type B Pre-test to determine TR1PUTMIN
  • 5.2. TB001 – Basic Type B Exchange and timings measurement
  • 5.3. TB002.x – Basic Type B Exchange with supported SoS and EoS
  • 5.4. TB003 – Type B Correct Removal
  • 5.5. TB004.x – Basic Type B Exchange with the minimum and the default maximum Frame Delay Time PCD to PICC
  • 5.6. TB006.x – Basic Type B Exchange with the minimum and the maximum character-to-character delay
  • 5.7. TB101.x – Type B Installation with supported values of ADC
  • 5.8. TB102.x – Type B Installation with supported values of FO
  • 5.9. TB104.x – Type B Installation with supported values of Bit_Rate_Capability
  • 5.10. TB106.x – Type B Installation with supported values of ADF
  • 5.11. TB107.x – Type B Installation with supported values of b4-b2 of Protocol_Type
  • 5.12. TB108.x – Type B Installation with supported values of MBLI
  • 5.13. TB110.x – Type B Installation with different values of ATQB
  • 5.14. TB201.xy – Type B Error free non-chained I-Blocks exchanges for all possible values of FWT
  • 5.15. TB202.xy – Type B Error free chained I-Blocks in both directions for different values of FSC
  • 5.16. TB203.xy – Type B Error free chained I-Blocks transmission for FSC = 16 to 256 bytes
  • 5.17. TB204 – Type B Error free request for Frame Waiting Time Extension on non-chained I-Blocks
  • 5.18. TB205 – Type B Error free request for Frame Waiting Time Extension during chaining in both directions
  • 5.19. TB206 – Type B Error free chained I-Blocks in both directions with different values of FSD
  • 5.20. TB210 – Type B Error free chained I-Blocks reception with rare frame sizes
  • 5.21. TB215.x – Type B Error free exchange with the minimum Frame Delay Time PCD to PICC for different values of the Frame Waiting Time
  • 5.22. TB301.xy – Type B Polling with an error after WUPB
  • 5.23. TB303 – Type B Polling with detection of a Type B then a Type A PICC
  • 5.24. TB304.xy – Type B Collision detection with an error after WUPB
  • 5.25. TB305.x – Type B Activation with ‘noise’ after ATTRIB
  • 5.26. TB306.xy – Type B Activation with an error after ATTRIB
  • 5.27. TB311.x – Type B Collision detection with a time-out after WUPB
  • 5.28. TB312.x – Type B Activation with a time-out after ATTRIB
  • 5.29 TB335.xy – Type B Activation with respect of the EMD Suppression behavior after ATTRIB
  • 5.30. TB340.x – Type B Activation with respect of the ‘deaf time’ after ATTRIB
  • 5.31. TB401.xy – Type B Error notification on an I-Block not indicating chaining
  • 5.32. TB402 – Type B Time-out after an I-Block not indicating chaining
  • 5.33. TB403.x – Type B Transmission error in response to an I-Block not indicating chaining
  • 5.34. TB404.xy – Type B Protocol error in response to an I-Block not indicating chaining
  • 5.35. TB405.xy – Type B Error notification on an I-Block indicating chaining
  • 5.36. TB406 – Type B Time-out after an I-Block indicating chaining
  • 5.37. TB407 – Type B Transmission error in response to an I-Block indicating chaining
  • 5.38. TB408.xy – Type B Protocol error in response to an I-Block indicating chaining
  • 5.39. TB409.xy – Type B Time-out after an R(ACK) Block (i.e. error notification)
  • 5.40. TB410.x – Type B Transmission error in response to an R(ACK) Block
  • 5.41. TB411.xy – Type B Protocol error in response to an R(ACK) Block
  • 5.42. TB412.xy – Type B Single time-out after an S(WTX) Response Block (several values of WTXM)
  • 5.43. TB413 – Type B Repeated use of a FWT extension after a single S(WTX) Request
  • 5.44. TB414.x – Type B ‘Noise’ in response to an I-Block not indicating chaining
  • 5.45. TB415.x – Type B ‘Noise’ in response to an I-Block indicating chaining
  • 5.46. TB415.x – Type B ‘Noise’ in response to an R(ACK) Block
  • 5.47. TB417.xy – Type B Protocol error in response to an R(NAK)-Block sent to notify a transmission error
  • 5.48. TB420 – Type B Removal with an error after WUPB
  • 5.49. TB421 – Type B Consecutive time-outs after S(WTX) Response Blocks
  • 5.50. TB430.xy – Type B Block protocol with respect of the EMD suppression behavior
  • 5.51. TB435.x – Type B Block Protocol with respect of the ‘deaf time’

EMV® CONTACTLESS CARD LEVEL 1 TYPE APPROVAL

1. PICC ANALOG EMVCo TEST SUITE

This EMVCo PICC Analog test suite is compatible with the following standard:

EMVCo PICC Level 1

Analog Test Cases – Version 3.0

 

Our coverage of this test specification includes the following test cases (numbering according to the EMVCo version 3.0):

 

PICC Power Off and Power On States Field

  • 8.7.1.1. CA112.200 – Verifying the PICC Power Off State for Type A Communications
  • 8.7.1.2. CA113.200 – Verifying the PICC Power On State for Type A Communications
  • 8.7.1.3. CB112.200 – Verifying the PICC Power Off State for Type B Communications
  • 8.7.1.4. CB113.200 – Verifying the PICC Power On State for Type B Communications

 

PICC Behavior with Respect to the Radio Frequency Field

  • §8.7.2.1. CAB111.zrf – Verifying the PICC Influence on the Field

 

PICC Responsiveness of a Type A PICC

  • §8.7.3.1. CA121.zrf – Verifying the PICC Responsiveness at Minimum Field Intensity
  • 8.7.3.2. CA122.zrf – Verifying the PICC Responsiveness at Maximum Field Intensity
  • 8.7.3.3. CA123.zrf – Verifying the PICC Responsiveness at Nominal Field Intensity
  • 8.7.3.4. CA124.200 – Verifying the PICC Responsiveness at Minimum Carrier Frequency
  • 8.7.3.5. CA125.200 – Verifying the PICC Responsiveness at Maximum Carrier Frequency
  • 8.7.3.6. CA126.z00 – Verifying the PICC Responsiveness at Minimum Timing t1
  • 8.7.3.7. CA127.z00 – Verifying the PICC Responsiveness at Maximum Timing t1

 

Verifying the PICC Transmission for Type A

  • 8.7.4.1. CA131.zrf – Verifying the PICC Load Modulation for Type A
  • 8.7.4.2. CA132.200 – Verifying the PICC Subcarrier Frequency and Bit Rate
  • 8.7.4.3. CA133.200 – Verifying the PICC Subcarrier Modulation
  • 8.7.4.4. CA134.z00 – Verifying the Type A PICC Detectable Disturbances

 

Bit Level Coding for a Type A PICC

  • 8.7.5.1. CA143.200 – Verifying the Bit Coding and De-synchronization PICC to PCD
  • 8.7.5.2. CA144.200 – Verifying Type A PICC Timings

 

PICC Responsiveness of a Type B PICC

  • 8.7.6.1. CB121.zrf – Verifying the PICC Responsiveness at Minimum Field Intensity
  • 8.7.6.2. CB122.zrf – Verifying the PICC Responsiveness at Maximum Field Intensity
  • 8.7.6.3. CB123.zrf – Verifying the PICC Responsiveness at Nominal Field Intensity
  • 8.7.6.4. CB124.200 – Verifying the PICC Responsiveness at Minimum Carrier Frequency
  • 8.7.6.5. CB125.200 – Verifying the PICC Responsiveness at Maximum Carrier Frequency
  • 8.7.6.6. CB126.z00 – Verifying the PICC Responsiveness at Minimum PCD Modulation Index
  • 8.7.6.7. CB127.z00 – Verifying the PICC Responsiveness at Maximum PCD Modulation Index
  • 8.7.6.8. CB128.z00 – Verifying the PICC Responsiveness after a WUPA Command with Maximum Timing t1 at Minimum Field Intensity

 

Verifying the PICC Transmission for Type B

  • 8.7.7.1. CB131.zrf – Verifying the PICC Load Modulation for Type B
  • 8.7.7.2. CB132.200 – Verifying the PICC Subcarrier Frequency and Bit Rate
  • 8.7.7.3. CB133.200 – Verifying the PICC Subcarrier Modulation
  • 8.7.7.4. CB134.z00 – Verifying the Type B PICC Detectable Disturbances

 

Bit level Coding for a Type B PICC

  • 8.7.8.1. CB143.200 – Verifying the Synchronization, Bit Coding and De-synchronization PICC to PCD
  • 8.7.8.2. CB144.200 – Verifying the PICC Bit Boundaries
  • 8.7.8.3. CB145.200 – Verifying Type B PICC Timings
  • 8.7.8.4. CB147.200 – Verifying Maximum Bit Boundaries

 

 

2. PICC DIGITAL EMVCo TEST SUITE

This EMVCo PICC Digital test suite is based on the standard:

EMVCo PICC Level 1

Digital Test Cases – Version 3.0

 

Our coverage of this test specification includes the following test cases (numbering according to the EMVCo version 3.0):

 

Type A Tests:

  • 3.1. CA001, §3.2. CA002, §3.3. CA003, Basic Type A Exchange and Timings Measurement
  • 3.4. CA010.XY, §3.5. CA011.XY, §3.6. CA012.XY, Basic Type A Exchange with the minimum and longer Frame Delay Times PCD to PICC
  • 3.7. CA116, §3.8. CA117, §3.9. CA118, Type A Correct Installation with respect of the anticollision state machine
  • 3.10. CA120.x, §3.11. CA121.x, §3.12. CA122.x, Type A Handling of RATS
  • 3.13. CA126.x, §3.14. CA127.x, §3.15. CA128.x, Type A Consecutive Installations
  • 3.16. CA130.x, §3.17. CA131.x, §3.18. CA132.x, Type A Handling of the REQA Command
  • 3.19. CA204.x – Type A Installation with error in the IDLE state
  • 3.20. CA206.xy, §3.21. CA207.xy, §3.22. CA208.xy, Type A Installation with error in the READY state
  • 3.23. CA216.xy, §3.24. CA217.xy, §3.25. CA218.xy, Type A Installation with error in the ACTIVE state
  • 3.26. CA226, §3.27. CA227, §3.28. CA228, Type A Installation with error in the HALT state following ACTIVE state
  • 3.29. CA230, §3.30. CA231, §3.31. CA232, Type A Installation with error in the HALT state following PROTOCOL State
  • 3.32. CA233.x – Type A Installation with polling and with PICC Reset

 

Type B Tests:

  • 4.1. CB001 – Basic Type B Exchange and Timings Measurement
  • 4.2. CB010.xy – Basic Type B Exchange with the minimum and longer Frame Delay Times PCD to PICC
  • 4.3. CB010.xy – Basic Type B Exchange with the minimum supported SFGT PCD to PICC
  • 4.4. CB021.x – Basic Type B Exchange with the minimum and the maximum values of EGTPCD
  • 4.5. CB025.x – Basic Type B Exchange with minimum and maximum durations of (SoS) and (EoS)
  • 4.6. CB116 – Type B Correct Installation with respect of the anticollision state machine
  • 4.7. CB126.x – Type B Consecutive Installations (fixed PUPI)
  • 4.8. CB130.x – Type B Handling of the REQB Command
  • 4.9. CB150 – Type B Correct Installation with C-APDU sent in the ATTRIB Command Higher Layer INF field
  • 4.10. CB155.x – Type B Correct Installation with RFU values or values to be ignored
  • 4.11. CB204.x – Type B Installation with error in the IDLE state
  • 4.12. CB206.xy – Type B Installation with error in the READY state
  • 4.13. CB226.x – Type B Installation with error in the HALT state following the READY state
  • 4.14. CB227.x – Type B Installation with error in the HALT state following the ACTIVE State
  • 4.15. CB228.x – Type B Installation with WUPA command in the HALT state
  • 4.16. CB233.xy – Type B Installation with polling and with PICC Reset

 

Block Protocol Executable Tests:

  • 5.1. CC001.x – Support of the EMV CL Polling
  • 5.2. CC110.x – Reception of chained I-Blocks from the PCD
  • 5.3. CC203.x – Error notification on an I-Block not indicating chaining
  • 5.4. CC206.xy – Error after reception of a non-chained I-Block
  • 5.5. CC207 – Management of b2 in the PCB of S-Blocks
  • 5.6. CC210.xy – Error notification and error after reception of a chained I-Block
  • 5.7. CC233.xy – Block Protocol with PICC Reset
  • 5.8. CC241.x – Installation commands during Block Protocol
  • 5.9. CC245.x – Error at the beginning of the Block Protocol

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